Differences

This shows you the differences between two versions of the page.

--- devices:lenovo_t500 [2019/05/22 01:56] – Sean Rhone
+++ devices:lenovo_t500 [2024/08/13 20:05] (current) – removed Sean Rhone
@@ Line 1: / Line 1: @@
-====== Information ======
-  * Lenovo T500 laptop
-====== Resources ======
-  * [[https://support.lenovo.com/solutions/pd001301|Specifications]]
-  * [[https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles_pdf/43y6630_03.pdf|Hardware Maintenance Manual]] (([[https://thinkpads.com/support/hmm/hmm_pdf/43y6630_04.pdf|Mirror]]))
-====== Coreboot ======
-===== Issues =====
-  * When booting Ubuntu 18.10, there's a gfx error initially; type ''help'' and press ''Enter'' to boot
-  * :!: Be absolute certain to update the BIOS and ECP from the Lenovo Vendor BIOS with an attached rear-battery, as there is no way as of 2019/01/25 to update the ECP from Coreboot
-===== RAM =====
-==== Incompatible ====
-  * [[https://www.ebay.com/itm/8GB-DDR3-1066-MHZ-PC3-8500-2X4GB-SODIMM-MEMORY-FOR-MACBOOK-PRO-IMAC-MAC-MINI/330907626941|Generic 1066MHz RAM with UPC 609713501042]] ((incompatible with Coreboot 2018/12 (unknown day), incompatible with Libreboot 20160907, untested with Lenovo Vendor BIOS 3.26))
-==== Compatible ====
-  * [[https://www.gskill.com/en/product/f3-8500cl7d-8gbsq|G.SKILL F3-8500CL7D-8GBSQ]] ((compatible with Coreboot 2019/01/25, untested with Libreboot, untested with Lenovo Vendor BIOS 3.26))
-===== Dependencies =====
-==== Fedora Workstation ====
-  * :!: Fedora Workstation 29 **cannot** be used to compile older versions of Coreboot wanting a non-matching major GCC version for crossgcc ((see [[notes:old_coreboot|Old Coreboot]] notes))
-  sudo dnf install make ncurses-devel acpica-tools flex bison gcc-c++ patch zlib-devel gcc-gnat pciutils-devel
-==== openSUSE Tumbleweed ====
-****
-  sudo zypper install git-core make cmake ncurses-devel acpica flex bison gcc-c++ patch zlib-devel gcc-ada pciutils-devel
-===== Download Source =====
-==== Coreboot ====
-****
-  cd ~ && mkdir -p ~/'Projects' && rm -Rf ~/'Projects/coreboot/src' && git clone --branch 'master' --depth '1' --recurse-submodules 'https://review.coreboot.org/coreboot.git' ~/'Projects/coreboot/src' && sync
-==== Libreboot ====
-  * This is necessary for [[#ich9gen|ich9gen]]
-  cd ~ && mkdir -p ~/'Projects' && rm -Rf ~/'Projects/libreboot/src' && git clone --branch 'master' --depth '1' --recurse-submodules 'https://notabug.org/libreboot/libreboot.git' ~/'Projects/libreboot/src' && sync
-===== ich9gen =====
-==== Notes ====
-  * https://libreboot.org/docs/hardware/gm45_remove_me.html
-  * Generates a descriptor image free of IME ((Intel Management Engine)), and allows for use of the on-board ethernet controller
-==== Compile ====
-****
-  cd ~/'Projects/libreboot/src/resources/utilities/ich9deblob' && make clean && make jobs='16' && sync
-==== Generate ====
-  * :!: Change ''x'' to the on-board Ethernet MAC address formatted as ''XX:XX:XX:XX:XX:XX'' ((this should look like --macaddress ''XX:XX:XX:XX:XX:XX''))
-  cd ~/'Projects/libreboot/src/resources/utilities/ich9deblob' && ~/'Projects/libreboot/src/resources/utilities/ich9deblob/ich9gen' --macaddress 'x'
-==== Move ====
-  * This copies the generated ''ich9fdgbe_4m.bin'' to the necessary folder for Coreboot
-  * The T500 uses the same board build as the T400 in Coreboot currently, hence the ''t400'' mainboard name
-  * :!: If the BIOS chip is a different size other than ''4096KB'', change this
-  mkdir -p ~/'Projects/coreboot/src/3rdparty/blobs/mainboard/lenovo/t400' && mv ~/'Projects/libreboot/src/resources/utilities/ich9deblob/ich9fdgbe_4m.bin' ~/'Projects/coreboot/src/3rdparty/blobs/mainboard/lenovo/t400/descriptor.bin' && ls ~/'Projects/coreboot/src/3rdparty/blobs/mainboard/lenovo/t400/descriptor.bin' && cd ~ && rm -Rf ~/'Projects/libreboot' && sync
-===== Build Toolchain =====
-****
-  cd ~/'Projects/coreboot/src' && make 'crossgcc-clean' && make 'crossgcc-i386' CPUS='16'
-===== Settings =====
-  * Last updated: 2019/05/22
-  * Mainboard vendor: Lenovo
-  * Mainboard model: ThinkPad T500
-  * :!: ROM chip size: 4096 KB (4MB)
-  * Local version string: Spinesnap
-  * [*] Use CMOS for configuration values
-  * [*]   Load default configuration values into CMOS on each boot
-  * [ ] Compress ramstage with LZMA
-  * [ ] Include the coreboot .config file into the ROM image
-  * [ ] Create a table of timestamps collected during boot
-  * [ ] Enable VMX for virtualization
-  * [ ] Set IA32_FEATURE_CONTROL lock bit
-  * Include CPU microcode in CBFS: Do not include microcode updates
-  * [*] Add Intel descriptor.bin file ((keep ''3rdparty/blobs/mainboard/$(MAINBOARDDIR)/descriptor.bin'' path))
-  * Display -> Framebuffer mode: Linear "high-resolution" framebuffer
-  * [*] Enable PCIe Common Clock
-  * [*] Enable PCIe ASPM
-  * [*] Enable PCIe Clock Power Management
-  * [*] Enable PCIe ASPM L1 SubState
-  * [ ] Serial port on SuperIO
-  * [ ] Support Intel PCI-e WiFi adapters
-  * [ ] Send console output to a CBMEM buffer
-  * Default console log level: 0: EMERG
-  * [*] Don't show any POST codes
-  * SeaBIOS version: master
-  * [*] Hardware init during option ROM execution
-  * SeaBIOS debug level (verbosity): 0
-  cd ~/'Projects/coreboot/src' && make 'distclean' && make 'nconfig' && sync
-==== Query ====
-  * Presents config options that are changed from defaults
-  * [[https://coreboot.org/status/kconfig-options.html|Reference]]
-  * Last updated: 2019/04/16
-  cd ~/'Projects/coreboot/src' && make 'savedefconfig' && gio open ~/'Projects/coreboot/src/defconfig'
-<code>
-CONFIG_LOCALVERSION="Spinesnap"
-CONFIG_USE_OPTION_TABLE=y
-CONFIG_STATIC_OPTION_TABLE=y
-# CONFIG_COMPRESS_RAMSTAGE is not set
-# CONFIG_INCLUDE_CONFIG_FILE is not set
-# CONFIG_COLLECT_TIMESTAMPS is not set
-CONFIG_VENDOR_LENOVO=y
-# CONFIG_DRIVERS_UART_8250IO is not set
-CONFIG_HAVE_IFD_BIN=y
-CONFIG_BOARD_LENOVO_T500=y
-CONFIG_PCIEXP_L1_SUB_STATE=y
-CONFIG_COREBOOT_ROMSIZE_KB_4096=y
-CONFIG_PCIEXP_ASPM=y
-CONFIG_PCIEXP_COMMON_CLOCK=y
-CONFIG_PCIEXP_CLK_PM=y
-# CONFIG_CONSOLE_CBMEM is not set
-# CONFIG_ENABLE_VMX is not set
-# CONFIG_SET_IA32_FC_LOCK_BIT is not set
-CONFIG_CPU_MICROCODE_CBFS_NONE=y
-CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_NO_POST=y
-CONFIG_SEABIOS_MASTER=y
-CONFIG_SEABIOS_THREAD_OPTIONROMS=y</code>
-===== CMOS Settings =====
-  * Last updated: 2019/02/12
-  gio open ~/'Projects/coreboot/src/src/mainboard/lenovo/t400/cmos.default'
-  gfx_uma_size=352M
-===== Make =====
-****
-  cd ~/'Projects/coreboot/src' && make clean && make && sync
-===== Finalize =====
-****
-  mv ~/'Projects/coreboot/src/build/coreboot.rom' ~/'Downloads/T500-coreboot-'$(date +%Y-%m-%d)'.rom' && sync
-===== Flash =====
-  * :!: The initial flash **must** be done by an external programmer ((Running the Lenovo vendor BIOS through ''ifdtool'' with the ''--unlock'' flag does **not** unlock the chip; **so any re-flash to the Lenovo vendor BIOS will require an external programmer to flash different firmware**))
-  sync && sudo flashrom --programmer 'internal:laptop=force_I_want_a_brick' --chip 'MX25L3205D/MX25L3208D' --write ~/'Downloads/T500-coreboot-'*'.rom'